DE1 Spectrogram Plotter: Quick Setup GuideThis guide walks you through setting up a spectrogram plotter on the DE1 development board (Terasic/Altera Cyclone-based), covering hardware, software, signal flow, and tips for getting clear, real‑time spectrogram visuals. It’s aimed at hobbyists and students with basic FPGA and Linux/Windows development experience.
Overview
A spectrogram displays the frequency content of a signal over time — essentially a sequence of short-time Fourier transforms (STFT) presented as a time-frequency image. On the DE1, you can implement a spectrogram plotter by capturing audio (or test signals), buffering samples, performing FFTs on the FPGA or an attached processor, and sending magnitude data to a display or host PC for visualization.
Key components:
- Input source (microphone, line-in, ADC, or test signal generator)
- Sample buffering and windowing
- FFT engine (hardware IP core on FPGA or software on an embedded CPU)
- Magnitude calculation and scaling (logarithmic/linear)
- Display/output (VGA/HDMI on-board, serial/USB to host, or an attached TFT)
Hardware requirements
- DE1 development board (DE1 or DE1-SoC)
- Power supply and USB blaster (for programming)
- Audio input:
- For DE1: external ADC + audio front-end hooked to GPIO or via USB soundcard attached to host PC
- For DE1-SoC: on-board audio codec (if available) or USB soundcard
- Display option:
- On-board VGA connector (DE1) or HDMI (SoC variants), or
- USB/Serial link to a PC running visualization software
- Optional: microphone module, signal generator (for tests), SD card for storing data
Software & tools
- Intel Quartus Prime (for synthesizing FPGA design and programming)
- Qsys / Platform Designer (for building system with NIOS II soft CPU or memory-mapped FFT IP)
- NIOS II EDS (if using soft CPU) or ARM toolchain (for DE1-SoC HPS)
- FFT IP core (Intel/Altera FFT MegaCore) or an open-source FFT implementation in HDL
- Host-side visualization tools:
- Python with matplotlib and PySerial or PyUSB
- Real-time plotting libraries such as PyQtGraph for smoother refresh
- Optional: Audacity or any audio capture software for feeding test files
Design choices: FPGA FFT vs. Host FFT
-
FPGA FFT (hardware IP):
- Pros: Low latency, high throughput, offloads CPU
- Cons: Uses FPGA resources, more complex to integrate (DMA/memory arbitration)
-
Host FFT (software on NIOS/ARM or PC):
- Pros: Easier to implement and debug, flexible libraries (FFTW, NumPy)
- Cons: Higher latency, depends on processor performance
Decision tip: use FPGA FFT for real-time, high‑rate audio processing (e.g., >48 kHz and low latency). Use host FFT for rapid development and when FPGA resources are limited.
Signal chain and data flow
- Acquire samples (ADC or USB soundcard) at sample rate Fs (commonly 8–48 kHz).
- Buffer samples into frames of N samples (FFT size). Typical N values: 256, 512, 1024.
- Apply a window function (Hann/Hamming/Blackman) to reduce spectral leakage.
- Compute N-point FFT for each frame (with overlap, e.g., 50–75%).
- Calculate magnitude (|X[k]|) and convert to dB: 20·log10(|X[k]|).
- Map magnitude bins to pixel intensities and render rows over time to produce spectrogram.
Step-by-step quick setup (FPGA + host visualization)
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Prepare hardware
- Ensure DE1 powered and USB Blaster connected.
- Connect audio input (USB soundcard to host PC recommended for beginners).
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Build a simple data capture on host
- Use Python to capture audio from USB soundcard with sounddevice or PyAudio.
- Save frames (N samples) and send them via serial/USB to the DE1 (or perform FFT locally).
Example Python capture snippet (for local FFT and plotting):
import numpy as np import sounddevice as sd from scipy.signal import get_window from matplotlib import pyplot as plt from scipy.fft import rfft Fs = 44100 N = 1024 window = get_window('hann', N) def callback(indata, frames, time, status): samples = indata[:,0] * window X = np.abs(rfft(samples)) db = 20*np.log10(X + 1e-12) # send db to plotting routine or accumulate for spectrogram with sd.InputStream(channels=1, samplerate=Fs, blocksize=N, callback=callback): sd.sleep(60000)
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(Optional) FPGA/NIOS path
- In Platform Designer, instantiate FFT IP, memory (on-chip or SDRAM), and a DMA interface.
- Use an Avalon-MM or AXI interface to feed frames to the FFT core and read results.
- Implement a controller (NIOS II or HPS code) to manage buffers, overlap, and formatting for output.
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Visualization
- For real-time display on a PC, use PyQtGraph to update an image buffer row-by-row.
- For on-board VGA, write a VGA controller to stream spectrogram rows to video RAM and display.
Example PyQtGraph snippet concept:
import pyqtgraph as pg img = pg.ImageView() # update img.setImage(array) each time you have a new spectrogram matrix
Parameter tuning recommendations
-
FFT size N:
- Larger N → better frequency resolution, worse time resolution.
- Choose N = 512 or 1024 for audio; use 256 for lower latency.
-
Overlap:
- 50% overlap is common (hop size = N/2).
- Increase to 75% for smoother time continuity.
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Window:
- Hann is a good default. Blackman for better sidelobe suppression.
-
Scaling:
- Use dB scaling for human-audible plots. Clamp minimum values (e.g., -120 dB).
-
Display color maps:
- Use perceptually uniform colormaps (viridis, plasma) for clearer contrast.
Debugging tips
- Verify raw samples first (plot time-domain waveform).
- Start with a known test signal (sine sweeps, tones) to confirm frequency mapping.
- Check sample rate mismatches (wrong Fs produces stretched/compressed spectrogram).
- If using FPGA FFT, monitor buffer underruns/overruns and ensure DMA throughput matches sample rate.
- Use LEDs or debug UART prints on the board to trace state machine progress.
Example test signals
- Single-tone: verify a stable horizontal line at expected frequency.
- Two tones: confirm two distinct lines.
- Chirp (sweep): should appear as a sloped line across time.
- White noise: broad-band energy across frequencies.
Performance considerations
- Memory: storing many frames requires substantial RAM; prefer streaming into a circular buffer.
- Throughput: ensure the interface between ADC/capture and FFT (DMA, IRQs) is fast enough for chosen Fs and N.
- Latency: total latency = frame size / Fs + processing time + display pipeline. Reduce N or overlap to cut latency.
Example resources & references
- Intel/Altera FFT IP documentation for parameter tuning and resource usage.
- NIOS II handbook for embedded controller integration.
- Python libraries: sounddevice, scipy, numpy, pyqtgraph, matplotlib.
Final checklist before running
- Power and program the DE1.
- Confirm audio capture path and sample rate.
- Verify FFT implementation and windowing.
- Ensure visualization client accepts and displays incoming magnitude data.
- Test with simple tones, then progress to live audio.
If you want, I can: provide complete Quartus/Platform Designer steps for a NIOS+FFT implementation, write the NIOS C code to manage buffers and DMA, or produce a full Python visualization client. Which would you like next?
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